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HD74HC160/HD74HC161/ HD74HC162/HD74HC163
Synchronous Decade Counter (Direct Clear) Synchronous 4-bit Binary Counter (Direct Clear) Synchronous Decade Counter (Synchronous Clear) Synchronous 4-bit Binary Counter (Synchronous Clear)
Description
The HD74HC160 and the HD74HC162 are 4 bit decade counters, and the HD74HC161 and the HD74HC163 are 4 bit binary counters All flip-flops are clocked simultaneously on the low to high to transition (positive edge) of the clock input waveform. These counters may be preset using the load input. Presetting of all four flip-flops is synchronous to thte rising edge of clock. When load is held low counting is disabled and the data on the A, B, C, and D inputs is loaded into the counter on the rising edge of clock. If the load input is taken high before the positive edge of clock the count operation will be unaffected. All of these counters may be cleared by utilizing the clear input. The clear function on the HD74HC162 and HD74HC163 counters are synchronous to the clock. That is, the counters are cleared on the positive edge of clock while the clear input is held low. The HD74HC160 and HD74HC161 counters are cleared asynchronously. When the clear is taken low the counter is cleared immediately regardless of the clock. Two active high enable inputs Enable P and Enable T and a ripple carry output are provided to enable easy cascading of counters. Both enable inputs must be high to count. The Enable T input also enables the Ripple Carry output. When enabled, the Ripple Carry outputs a positive pulse when the counter overflows. This pulse is approximately equal in duration to the high level portion of the Q A outputs. The Ripple Carry output is fed to successive cascaded stages to facilitate easy implementation of N-bit counters.
Features
* * * * High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max
HD74HC160/HD74HC161/HD74HC162/HD74HC163
* Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C)
Function Table
Inputs Clock Clear* L H H H H Note:
1
Outputs Load X L H H H Decade Counter Enable P X X H L X Enable T X X H X L Binary Counter HD74HC161P HD74HC163P Qn Reset-clear Load input data Count No count No count
1. 162 and 163 Only-160 and 161 are Asynchronous Clear Devices HD74HC160P HD74HC162P
Asynchronous clear Synchronous clear
Pin Arrangement
Clear 1 Clock 2 A3 B4 Data Inputs C 5 D6 Enable P 7 GND 8 (Top view) CK A B C D P CLR Ripple Carry QA QB QC QD Load T
16 VCC Ripple 15 Carry Output 14 QA 13 QB Outputs 12 QC 11 QD 10 Enable T 9 Load
2
HD74HC160/HD74HC161/HD74HC162/HD74HC163
DC Characteristics
Ta = 25C Item Input voltage Symbol VIH Ta = -40 to +85C Max -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 A A I OL = 4 mA I OL = 5.2 mA Vin = VCC or GND Vin = VCC or GND, Iout = 0 A V I OH = -4 mA I OH = -5.2 mA Vin = VIH or VIL I OL = 20 A V Vin = VIH or VIL I OH = -20 A V Unit V Test Conditions
VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 -- 3.15 -- 4.2 -- -- -- -- -- -- -- -- -- -- 0.5 1.5 3.15 4.2 --
VIL
2.0 4.5 6.0
1.35 -- 1.8 -- 1.9 4.4 5.9 4.13 5.63 -- -- --
Output voltage
VOH
2.0 4.5 6.0 4.5 6.0
1.9 2.0 -- 4.4 4.5 -- 5.9 6.0 -- 4.18 -- 5.68 -- -- -- -- -- -- -- -- -- --
VOL
2.0 4.5 6.0 4.5 6.0
0.0 0.1 0.0 0.1 0.0 0.1 -- -- -- --
0.26 -- 0.26 -- 0.1 -- 4.0 --
Input current Quiescent supply current
Iin I CC
6.0 6.0
3
HD74HC160/HD74HC161/HD74HC162/HD74HC163
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25C Item Maximum clock frequency Symbol f max Ta = -40 to +85C Max 4 20 23 200 40 34 280 56 48 190 38 33 250 50 43 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- ns ns Clear to Clock (HC162, HC163 only) Load to Clock ns Data to Clock ns Clock to Ripple carry output ns Enable T to Ripple Carry output ns Clear to Q (HC160, HC161 only) ns Clock to Q Unit Test Conditions MHz
VCC (V) Min Typ Max Min 2.0 4.5 6.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 18 -- -- 23 -- -- 15 -- -- 16 -- 5 25 29 -- -- --
Propagation delay t PLH time t PHL
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0
160 -- 32 27 -- --
225 -- 45 38 -- --
150 -- 30 26 -- --
200 -- 40 34 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 156 31 26 156 31 26 156 31 26 0 0 0 125 25 21
Setup time
t su
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0
125 -- 25 21 9 --
125 -- 25 21 15 --
125 -- 25 21 0 0 0 -- -- -- -7 --
Hold time
th
2.0 4.5 6.0
Removal time
t rem
2.0 4.5 6.0
100 -- 20 17 7 --
4
HD74HC160/HD74HC161/HD74HC162/HD74HC163
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) (cont)
Ta = 25C Item Pulse width Symbol tw Ta = -40 to +85C Max -- -- -- 95 19 16 10 pF ns Unit ns Test Conditions
VCC (V) Min Typ Max Min 2.0 4.5 6.0 80 16 14 -- -- -- -- -- 6 -- -- 5 -- 5 -- -- -- 75 15 13 10 100 20 17 -- -- -- --
Output rise/fall time
t TLH t THL
2.0 4.5 6.0
Input capacitance
Cin
--
Function Table
Count Enable/Disable
Control Inputs Load H L X X X Enable P H H L H L Enable T H H H L L Result at Outputs QA to QD Count No count No count No count No count High when QA to QD are maximum L L Ripple Carry Output High when QA to QD are maximum
5
HD74HC160/HD74HC161/HD74HC162/HD74HC163
Timing Diagram
HD74HC160/HD74HC162 Sequence illustrated in waveforms. 1. 2. 3. 4. Clear outputs to zero. Preset to BCD seven. Count to eight, nine, zero, one, two and three. Inhibit
Clear(HC160) Clear(HC162) Load A Data Inputs B C D Clock(HC160) Clock(HC162) Count Enables Enable P Enable T QA Outputs QB QC QD Ripple Carry Output (Asynchronous) (Synchronous)
7 Clear Load
8
9
0
1
2
3 Inhibit
Count
6
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC161/HD74HC163 Sequence illustrated in waveforms. 1. 2. 3. 4. Clear outputs to zero. Preset to binary twelve. Count to thirteen, fourteen, fifteen, zero, one and two. Inhibit
Clear(HC161) Clear(HC163) Load A Data Inputs B C D Clock(HC161) Clock(HC163) Count Enables Enable P Enable T QA Outputs QB QC QD Ripple Carry Output (Asynchronous) (Synchronous)
12 13 14 Clear Load
15
0
1
2 Inhibit
Count
7
HD74HC160/HD74HC161/HD74HC162/HD74HC163
Logic Diagram
HD74HC160 Decade Counter with Asynchronous Clear
T1 CLR C C Load Load P1 T2 CLR C C Load Load P2 T3 CLR C C Load Load P3 T4 CLR C C Load Load P4 VCC CLR C C Load Load
QA
QA
A
QA
QB
QB
QB
B
QC
QC
QC
C
QD
QD
D
QD
Enable P Enable T Clear
Ripple Carry Output
Clock Load
8
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC161 4-bit Binary Counter with Asynchronous Clear
A
T1 CLR C C Load Load P1 T2 CLR C C Load Load P2 T3 CLR C C Load Load P3 T4 CLR C C Load Load P4
QA
QA
QA
QB
QB
QB
B
QC
QC
QC
C
QD
QD
QD
D
Enable P Enable T Clear CLR C C Load Load
Ripple Carry Output
Clock Load
9
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC162 Decade Counter with Synchronous Clear
T CK CK LD LD LD*CLR LD*CLR CLR CLR IN T CK CK LD LD LD*CLR LD*CLR CLR CLR IN T CK CK LD LD LD*CLR LD*CLR CLR CLR IN T CK CK LD LD LD*CLR LD*CLR CLR CLR IN
Q
QA
A
Q
Q
QB
B
Q Q
QC
C
Q
Q
QD
D P T CK VCC
Q
RCO
CK CK
LD
LD LD LD*CLR LD*CLR CLR
CLR
CLR
10
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC163 4-bit Binary Counter with Synchronous Clear
T CK CK LD LD LD*CLR LD*CLR CLR CLR IN T CK CK LD LD LD*CLR LD*CLR CLR CLR IN T CK CK LD LD LD*CLR LD*CLR CLR CLR IN T CR CR LD LD LD*CLR LD*CLR CLR CLR IN Q
QA
A
Q
Q
QB
B
Q Q
QC
C
Q
Q
QD
D P T CK
Q
RCO
CK CK
LD
LD LD LD*CLR LD*CLR CLR
CLR
CLR
11
19.20 20.00 Max 16 9 7.40 Max 6.30
Unit: mm
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 0.25
0.48 0.10
0.25 - 0.05 0 - 15
Hitachi Code JEDEC EIAJ Weight (reference value)
+ 0.13
DP-16 Conforms Conforms 1.07 g
Unit: mm
10.06 10.5 Max 16 9
5.5
1
*0.22 0.05 0.20 0.04
8 0.80 Max
2.20 Max
0.20 7.80 + 0.30 -
1.15 0 - 8 0.70 0.20
1.27 *0.42 0.08 0.40 0.06
0.12 M
Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA -- Conforms 0.24 g
*Dimension including the plating thickness Base material dimension
0.10 0.10
0.15
Unit: mm
9.9 10.3 Max 16 9 3.95 1 1.27 0.635 Max 8
0.11 0.14 + 0.04 - 1.75 Max
*0.22 0.03 0.20 0.03
0.10 6.10 + 0.30 -
1.08 0 - 8
0.67 0.60 + 0.20 -
*0.42 0.08 0.40 0.06
0.15 0.25 M
*Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
FP-16DN Conforms Conforms 0.15 g
Unit: mm
5.00 5.30 Max 16 9 4.40 1
0.08 *0.22 + 0.07 -
8 0.65 1.0 6.40 0.20 0 - 8 0.50 0.10
0.20 0.06
0.13 M 0.65 Max
*0.17 0.05 0.15 0.04
1.10 Max
0.10
0.07 +0.03 -0.04
*Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
TTP-16DA -- -- 0.05 g
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.

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